Circuit Protection Using SiC FETs in a Dual-Gate Configuration

Interest in solid-state circuit breakers and solid-state power controllers has grown in recent years. Given their low on-resistance at high voltage ratings and their ability to limit current when needed, SiC JFETs have long been considered ideal devices for this application. We investigate the use of normally-off SiC FETs in dual-gate structures to simplify the development of high-current DC circuit breakers and AC circuit breakers.

Interest in solid-state circuit breakers and solid-state power controllers has grown in recent years. Given their low on-resistance at high voltage ratings and their ability to limit current when needed, SiC JFETs have long been considered ideal devices for this application. We investigate the use of normally-off SiC FETs in dual-gate structures to simplify the development of high-current DC circuit breakers and AC circuit breakers.

There are many studies exploring the advantages of solid-state circuit breakers, which can be broadly classified into hybrid circuit breakers and fully solid-state circuit breakers with no mechanical parts. This article focuses on solid-state circuit breakers. Table 1 presents an overview of the advantages and disadvantages of solid-state circuit breakers when compared to existing electromechanical circuit breakers and relays. A known important advantage of solid-state circuit breakers is the ability to interrupt current flow within 1 nanosecond/microsecond, compared to the millisecond time required for electromechanical circuit breakers. This advantage becomes increasingly valuable when interrupting power sources with very low internal impedance, such as electric vehicle batteries. It can also be used to interrupt DC circuits without the need for comprehensive arc prevention measures. The absence of moving parts and contact degradation allows for additional cycles of failsafe before field replacement. However, solid state circuit breakers have higher resistance than mechanical contacts, making their cost-to-current ratio much higher. For basic unipolar devices, the resistance increases with V2 or V2.5 for the same area of ​​the material used as the voltage rating of the semiconductor becomes higher. This has a direct impact on cost due to the increased voltage level of the circuit breaker.

Circuit Protection Using SiC FETs in a Dual-Gate Configuration
Table 1: Comparison of Characteristics of Solid State Circuit Breakers and Electromechanical Circuit Breakers

Why use SiC for circuit protection

The primary function of a solid-state protection circuit is to conduct current with as little resistive loss as possible in the on-state, and to be able to interrupt the current when the system controller recommends it. At low voltages of less than 600 V, the low resistance of silicon MOSFETs is a cost-effective option for creating circuit breakers, relays and Electronic fuses, and is already used in 48V battery systems. Once the required voltage exceeds 600 V, even advanced silicon technologies such as super-junction (SJ) MOSFETs have excessive resistance. IGBTs, although capable of providing very low differential impedance, have inflection points in their conduction characteristics, resulting in excessively high power losses during conduction, which in turn results in the need to remove more heat. For voltages above 3000 V, circuit breakers are implemented using IGCTs.

Figure 1 shows the specific on-resistance of silicon SJ MOSFETs, GaN FETs, SiC MOSFETs, and SiC-JFET-based SiC FETs. A fact that should be apparent is that SiC FETs can achieve extremely low resistance per unit area over a large voltage range from 600 to 2000 V. This has allowed the development of solid-state circuit breakers with extremely low conduction losses, extremely compact and cost-effective. They can be very useful in thermally constrained applications. All SiC devices are also capable of withstanding high transient temperature rises (eg during short circuit events), a feature that is useful when dealing with four times the energy per unit area of ​​silicon devices. This is because the wide bandgap results in a much higher temperature required to generate enough carrier carriers from heat, reducing the voltage blocking capability of the switch. The thermal conductivity of 4H-SiC is three times higher than that of GaN or Si-based devices, allowing efficient heat dissipation, allowing operation at higher current densities.

Circuit Protection Using SiC FETs in a Dual-Gate Configuration
Figure 1: Comparison of specific on-resistance versus voltage for various semiconductors

Main applications of SiC-based circuit protection

Given the generally high cost of solid-state circuit protection, it is likely to be used in situations where speed, controllability, reliability, and light weight are more important than the cost premium. This is typical of new technology, and it will have a wider range of applications due to the cost reductions that always come as the technology (especially SiC) matures and expands.

Given the rapid growth of DC power sources (solar, EV batteries, energy storage, etc.) and DC loads, the DC circuit breaker field is looking at SiC-based circuit breakers that require 750 VC 1200 V FETs. In electric vehicle, boat, and aircraft applications, where very low conduction losses are required, and arc flash poses a safety hazard, solid-state circuit breakers are a good solution. The ability of a solid-state solution to quickly interrupt a short-circuit event without allowing the current to rise above 5 kA or 10 kA is invaluable. In the protection hierarchy, faster coordination can be achieved between the main circuit breaker and the downstream circuit breakers.

High-power AC circuit breakers can also benefit from the use of solid-state solutions, mainly because on-resistance can now be achieved using 1200 V SiC FETs comparable to mechanical contacts, and the overall solution can greatly simplify field maintenance. Fast current interruption and inrush current limiting directly brought about by solid-state switching can improve functionality and thus add more value.

AC circuit breakers in the home space can take advantage of the unmatched low conduction losses of SiC devices to enable smart solutions to manage energy in emerging environments using solar panels, energy storage and electric vehicles in addition to traditional loads. Minimizing the amount of heat generated results in a cost-effective circuit breaker panel that does not require any fans for cooling.

In addition to solid-state circuit breakers, these devices are used to construct solid-state power controllers that regulate managed power flow between multiple power generation sources and loads on ships and aircraft. Like fault current, inrush current can also be effectively controlled.

Solid-state circuit breakers can also play a role in railway traction, facilitating better management of faster fault responses between the catenary and system power electronics. This can help reduce the size, weight and cost of downstream power electronics. System reliability and longevity also benefit.

In a range of emerging applications, SiC JFETs are used as bidirectional current-limiting switches, self-powered circuit breakers, and super-cascode high-voltage circuit breakers.

In terms of functional safety, normally-on SiC JFETs are useful devices for applications where it is beneficial for the transistor to remain on even if gate power is lost. Consider a full-bridge rectifier that uses normally-off devices on the high side and normally-on JFETs on the low side. This bridge still exists as a normally-off device to the input side, but since the low-side JFETs can short the output when both are on, they can act as shunts when control is lost. This approach can improve the design of motor inverters, where simply using normally-on devices as low-side FETs can simplify the management of functional safety.

In all of the above areas, the ability of a solid-state solution to monitor its health and allow easy scheduled maintenance rather than repair after failure is a significant advantage, and the fact that dual-gate SiC FETs offer the best option in this regard .

JFET, SiC FET, and Double-Gate SiC FET Structures

Figure 2 compares the basic structures of SiC MOSFETs and SiC JFETs. Figure 1 shows that SiC JFETs have lower on-resistance per unit area, thanks to the absence of a low-migration channel and the need to protect the gate oxide from strong magnetic fields that require additional shielding, which increases turn-on resistance. However, JFETs are normally-on devices, and to create normally-off devices, a low-voltage silicon MOSFET can be connected in series with a SiC JFET in a cascode configuration, as shown in Figure 2, which increases RDS(on) by 5 C 15 %. This series-connected device can be configured as a basic cascode structure, also known as a SiC FET, or as a dual-gate device, allowing the gates of both the low-voltage MOSFET and SiC JFET to be externally accessible.

Circuit Protection Using SiC FETs in a Dual-Gate Configuration
Figure 2: Resistance difference between SiC MOSFET and SiC FET due to low channel resistance in JFET

Circuit Protection Using SiC FETs in a Dual-Gate Configuration
Figure 3: Structure of a SiC JFET-based device

In Figure 3, the diagram on the left shows a SiC JFET in the same TO-247 package as a conventional MOSFET. The diagram in the middle shows how a low voltage MOSFET is stacked on the source pad of a high voltage SiC JFET die to form a SiC FET cascode structure. Inside the package, the gate of the SiC JFET is connected to the source of the low-voltage MOSFET, forming a complete cascode connection. The device can be used like a normally-off MOSFET. The diagram on the right shows how to expose the MOSFET gate and JFET gate in the same TO-247-4L package for user control. This is called a double gate FET (DG FET). In the example in the figure, the resistance of the 1200 V JFET is 7 mΩ at VGS = 2 V and 8 mΩ at VGS = 0 V. In a SiC FET, the JFET operates with VGS close to 0 V in the on state. The device resistance is 9 mΩ, of which 1 mΩ is contributed by the low voltage MOSFET. In the dual-gate device on the right, in the on state, the MOSFET is on, and since the JFET can operate from a gate voltage of 2 to 2.5 V, its resistance drops to 7 mΩ, while the composite device has a resistance of 8 mΩ. This on-state behavior is shown in Figure 4.

Circuit Protection Using SiC FETs in a Dual-Gate Configuration
Figure 4: VGS = 2 V has lower resistance compared to VGS = 0 V for 1200 V dual gate FET

Figure 5 shows the behavior of the VGS of the JFET at 1 mA as a function of temperature, equivalent to sensing the knee voltage of the gate-source SiC PN junction. When the device is turned on, the gate drive circuit can sense this voltage and directly determine TJ. This perceptual TJ approach is far more accurate than perceiving VDS(on) = (ID ∙ RDS(on)). The low-current knee voltage varies little from device to device because it is not affected by many process factors that cause RDS(on) to vary. It also excels in speed and accuracy when integrating temperature-sensing diodes into SiC chips. Finally, using an NTC in a power module to sense temperature and/or sense the TJ of a control IC cannot match the necessary response speed and accuracy that this JFET VGS sensing method can achieve.

Circuit Protection Using SiC FETs in a Dual-Gate Configuration
Figure 5: Using the on-state VGS of a SiC JFET to monitor its junction temperature

JFET TJ changes under known operating conditions can be compared to benchmarks for checking device aging under normal operating conditions. Too high a TJ may signal the end of life, allowing you to replace it before it fails catastrophically. Because the TJ responds with microsecond accuracy, it is also possible to monitor chip heating during transient events to shut down before the switch fails, such as when a circuit breaker activates.

In a simple 4-terminal DG FET, the on-state voltage drop in the low-voltage FET affects the externally measured VGS, so a correction must be made to get the junction temperature. In larger pin count packages, the JFET source potential can be used directly to improve the accuracy of the extracted TJ. It is also possible to use the DG FET as two discrete devices with an ultra-low RDS(on) logic level SMT discrete FET, which gives you direct access to the JFET gate and source.

Circuit Protection Using SiC FETs in a Dual-Gate Configuration
Figure 6: Circuit structure of solid state circuit breaker (power element)

solid state circuit breaker

A common circuit implementation for solid-state circuit breakers is shown in Figure 6. The two switches are connected in a common source configuration, providing bidirectional voltage blocking and current flow. Use an RC snubber circuit (Rs, Cs) across a single FET or a pair of FETs. Transient Voltage Suppression Devices (MOVs, TVS) are placed across the transistors to absorb the inductive energy created by the line and load inductances when the current is cut off. This circuit configuration can be used for many applications. For example, in electric mobility applications, this circuit can be used in place of a DC disconnect switch. Because all battery energy goes through the solid state switch, a circuit breaker rated at 500 – 1500 A, 1200 V requires less than 1mΩ of resistance. This requires paralleling many devices, and the use of ultra-low RDS(on) devices simplifies this task.

The experimental setup shown in Figure 7 can be used to demonstrate the ability to parallel dual-gate SiC FETs and interrupt large fault currents. Three TO247-4L devices are connected in parallel, each is 9 mΩ, 1200 V, and the overall switch resistance is 3 mΩ.

Circuit Protection Using SiC FETs in a Dual-Gate Configuration
Figure 7: Schematic diagram of the solid-state circuit breaker test circuit, where the switch consists of three dual-gate SiCFETs in parallel. SiC Schottky diodes D1-D4 (UJ3D065200K3S) are used as TVS (instead of MOVs) to protect the switch at turn-off instants.

Circuit Protection Using SiC FETs in a Dual-Gate Configuration
Left – Figure 8: RDS(on) vs. temperature in a 1200 V dual gate device
Right – Figure 9: Vth vs. Temperature in a 1200 V Dual-Gate Device

Figure 8 shows that the device on-resistance has a positive temperature coefficient, ensuring that the current can be shared well when the device is turned on. These devices operate with standard MOSFETs, as in this test with a -5 to 15 V gate drive, but a 0 to 12 V unipolar gate drive can also be used. A 5 Ω resistor is placed at the gate of each MOSFET and JFET to assist parallel operation during switching. This 5 Ω JFET RG will slow the switch off. Since this resistance is much larger than the inherent gate resistance of the JFET, it helps set the turn-off speed of the cascode to match the switching behavior of the three parallel devices. Place an RC snubber circuit across each device, as this configuration minimizes the stray inductance that exists between the snubber circuit and the switch. The slight change in JFET Vth with temperature (Figure 9) is also important to ensure excellent current sharing at the switching instant.

Figure 10 shows the measured turn-off behavior of three parallel FETs. With a bus voltage of 400 V, the TVS clamp was created using a 200 A, 650 V SiC Schottky diode UJ3D065200K3S that absorbs the avalanche energy of a 2 µH inductance used to stimulate the line inductance. At 1000 A, this energy is 1 J, so three such diodes can be paralleled to provide enough margin. The gate pulse VGS is used to ramp the current to 1150 A in 10 µs, then turn off. Due to the constant current in the 2 µH Inductor, the speed at which the device voltage rises depends on the switching speed (in this case, the RG of the JFET), and a snubber circuit is used. Once the device reaches the clamping voltage determined by the breakdown of the TVS diode, current is delivered to the TVS diode. With this arrangement, three TO-247 devices can smoothly turn off 1150 A, as shown in Figure 10. Note that the current in the SiC FET is interrupted in less than 500 ns and then delivered to the avalanche’s TVS array. The 5 µs duration for the current to return to zero is determined by the peak current, and the slope of the drop is determined by BV(TVS)/L1. The brief voltage spikes in the VDS waveform are the result of the relatively fast di/dt when the switch is off and the stray inductance between the device and the TVS diode. This can be further mitigated by reducing the turn-off speed and/or adjusting the RC snubber circuit.

Circuit Protection Using SiC FETs in a Dual-Gate Configuration
Figure 10: Turn-off transient waveform measured at 1150 A for three parallel 1200 V dual-gate devices in the test circuit shown in Figure 7. The TVS clamping voltage is approximately 900 V.

Figure 11 extends the dual-gate device suitability study to a 2 mΩ, 1200 V module in the SOT-227 package, where a total of six such devices are connected in parallel. The switching speed of the cascode structure can be reduced using a 22 Ω resistor, and the device is equipped with an 11 Ω, 20 nF snubber circuit. To facilitate higher current testing, the line inductor was reduced to 0.4 µH and five 200 A, 650 V diodes in parallel were used as TVS. Figure 12 shows the waveforms obtained from the test, when the module was used to interrupt the peak current of 1950 A. Voltage spikes in the VDS waveform can be eliminated by adjusting the JFET off with a 22 Ω resistor and using a larger RC snubber circuit.

Circuit Protection Using SiC FETs in a Dual-Gate Configuration
Figure 11: Schematic of the solid-state circuit breaker test circuit, where the switch is constructed from a dual-gate module in a SOT-227 package with six 9 mΩ, 1200 V devices in parallel. Together with the package parasitics, it forms a 2.2 mΩ, 1200 V device with a rating greater than 300 A.

commercial application

Of course, a full solid state circuit breaker implementation would use two such switches and have them connected in a common source configuration. To cope with higher currents, modules are being developed that use more devices in parallel. While in these examples the use of a dual gate device in cascode form is driven by a standard silicon MOSFET/IGBT gate driver, more complex implementations can use a low voltage MOSFET as the start switch to directly drive the SiC JFET’s gate. This enables SIC JFETs to achieve extremely low conduction losses and also supports junction temperature sensing. Current-sensing low-voltage MOSFETs stacked on top of JFETs can eliminate the need for expensive external current-sensing methods.

SiC transistors can handle large amounts of avalanche energy, up to 4 times that of silicon for a given area. However, as line inductance and current increase, absorbing all the avalanche stress in SiC devices becomes unrealistic, resulting in the need to use parallel MOV devices. Therefore, the cost of the solid state circuit breaker solution will depend on the cost of the SiC switch and the MOVs used. The clamping nature of the MOV makes its resistance much higher, so the peak voltage will be much higher than when the SiC TVS diodes were used in these demonstrations. The MOV is sized so that the peak voltage is lower than the rated breakdown voltage of the SiC device, and if the voltage rating of the SiC component is reduced, this MOV must be larger. In the example in this paper, the bus voltage is in the 400 C 600 V range, and the MOV keeps the peak voltage below 1200 V to handle the worst off current, allowing the use of 1200 V SiC devices. In theory, lower-cost MOVs that can control peak voltages to 1500 C 1700 V may require 1700 V devices, which would nearly double the cost of a SiC solution. In other words, there is a trade-off between the cost of SiC and the cost and size of MOVs, and this gradual change comes with the worst energy the circuit breaker has to withstand. In some applications, final volume and weight considerations limit the size of the circuit breaker, resulting in the need for higher voltage rated and more expensive SiC circuit breakers.

Circuit Protection Using SiC FETs in a Dual-Gate Configuration
Figure 12: Turn-off transient waveform measured at 1950 A for a 1200 V dual gate module in the test circuit shown in Figure 11. The TVS clamp voltage is about 900 V.

As the adoption of SiC devices increases, its cost is rapidly decreasing, and most of the market forecasts for SiC devices focus on the possible growth of the electric vehicle segment. Yield-driven efficiencies are expected to halve the cost of SiC wafers in the next few years. Predicted advancements in SiC JFET technology will steadily reduce RDSA and, along with efficiencies from yield, will drive costs to new lows. These factors, along with projected SiC revenue growth, are shown in Figure 13 (source: IHS Markit). Most current forecasts do not account for the impact of large-scale adoption of solid-state circuit breakers, presumably due to the cost difference between solid-state circuit breakers and electromechanical circuit breakers. If indeed all battery power goes through solid-state circuit breakers, the use of solid-state circuit breakers in electric vehicles alone would double the projected market size. If this logic is extended to the other application areas discussed in Section 3, the market potential is several times larger than imagined in Figure 13, even if only a small fraction of the DC power produced and used passes through solid-state circuit breakers and controllers.

Circuit Protection Using SiC FETs in a Dual-Gate Configuration
Figure 13: Projected SiC revenue growth, SiC wafer cost evolution and technology advancements (RDSA reduction). Solid-state circuit breakers could double the SiC market in the second half of the 2020s.

in conclusion

Solid state circuit breakers using 600 C 1200 V class semiconductors may be approaching the tipping point for their adoption. Given the low RDSA that SiC devices can offer, they are well suited for this voltage level, and SiC JFET-based solutions have shown to excel in this regard. The growth of the overall market for SiC in electric vehicles and other applications is creating a virtuous circle, driving down costs. Technological advancements are rapidly reducing the RDSA of SiC FETs, and this trend will continue over the next few years, reducing the RDSA by another half to two-thirds. These self-reinforcing trends will drive increased cost-effectiveness and subsequent adoption of solid-state circuit breakers. Knowledge of all the system-level benefits of circuit breakers and the ability to explore solid-state, the metrics these devices provide to help monitor degradation, and the trends now emerging from Industry 4.0 all point to a major change on the horizon for solid-state circuit protection.

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